Accelerating Semiconductor Chip Development with Deterministic Automation and AI

Agnisys is introducing agentic AI and automation tools for Network-on-Chip (NoC) and Design-for-Test (DFT) workflows at the Design Automation Conference (DAC) 2026, according to a company press release. The technology combines deterministic automation with AI to accelerate semiconductor development cycles.

The company’s approach targets the complexity of modern chip design by integrating AI agents into the semiconductor engineering process. According to Agnisys, these tools are designed to help semiconductor companies develop chips faster by reducing the manual effort required for verification and testing.

The announcement focuses on three primary technical areas: Agentic AI, Network-on-Chip (NoC) optimization, and Design-for-Test (DFT) automation.

Deterministic automation refers to a system where a specific input always produces the same output, ensuring consistency in the chip’s physical layout and logic. Agnisys claims that by pairing this certainty with the adaptive capabilities of AI, engineers can automate repetitive tasks without losing control over the final hardware specifications.

Network-on-Chip (NoC) is the communication subsystem on a chip that connects various processing cores and memory controllers. As chips grow in complexity and core counts increase, managing the data traffic between these components becomes a primary bottleneck. Agnisys is showcasing breakthroughs in how these networks are designed and automated to improve data throughput and reduce latency.

Design-for-Test (DFT) is the practice of adding specialized circuitry to a chip to allow engineers to verify that the hardware was manufactured correctly. Agnisys stated that its automation breakthroughs in DFT aim to streamline the process of identifying manufacturing defects, which reduces the time between the design phase and the final product release.

The use of agentic AI marks a shift from traditional AI assistants to autonomous agents. These agents can execute multi-step workflows, make decisions based on design constraints, and iterate on solutions without constant human intervention. Agnisys describes this as combining the power of AI with the reliability of deterministic systems to remove friction from the development pipeline.

The demonstrations at DAC 2026 are intended to show how these tools integrate into existing Electronic Design Automation (EDA) environments. The goal is to provide a framework where AI handles the optimization of NoC and DFT structures while maintaining the strict requirements of semiconductor fabrication.