AMD Shifts to Sea-of-Wires Architecture
AMD Zen 6: A New Standard – “SEA-OF-WIRES” Interconnect
The article suggests that AMD is planning to broadly implement a new interconnect technology, dubbed “SEA-OF-WIRES,” wiht Zen 6.This follows thier successful adoption of chiplet designs starting with Zen 2. The initial experiment with this technology was “Stix Halo,” and now AMD appears ready to make “SEA-OF-WIRES” a standard practice.
Key takeaways:
* Generalization of Approach: AMD will likely use “SEA-OF-WIRES” across its Zen 6 architecture.
* Benefits: This new interconnect aims to reduce latency and power consumption.
* Impact on Future Products: This could be notably beneficial for custom APUs, like those planned for next-generation consoles (specifically mentioning the Xbox Magnus, aiming for 4K/120 FPS performance).
The article includes images illustrating the chiplet design and details of the ”SEA-OF-WIRES” interconnect.