Intel Nova Lake-S Leaks: Core Ultra 400 Specs and New LGA 1954 Socket Details

Intel is preparing a significant architectural overhaul for its desktop processor segment with the upcoming Nova Lake-S lineup. The next-generation CPUs, expected to launch by the second half of 2026, aim to revamp tile configurations and introduce new caching technologies to better compete with AMD’s 3D V-Cache implementations.

The Nova Lake-S series, which may be branded as Core Ultra 400, is reportedly designed to address performance gaps identified in the previous Arrow Lake launch. According to reporting from Wccftech, the lineup will feature a dual-compute tile design and the integration of a new “bLLC” cache, which could reach up to 288 MB in high-end models.

Hardware Specifications and SKU Details

Leaked preliminary SKU lists indicate a broad range of options, with core counts spanning from 6-core Core Ultra 3 variants up to a flagship 52-core Core Ultra 9 model. Recent reports from Jaykihn suggest that one of the high-end dual-compute tile parts may have been upgraded from 42 to 44 cores.

The lineup is expected to include eight different SKUs. This includes variants with configurable TDP values as low as 35W and at least one graphics-disabled F-series SKU, identified by the GT0 variant MS2KF.

Technical specifications for the platform include support for DDR5-8000 memory, and forward. The CPUs will utilize the new Xe3P iGPU architecture and NPU6 for AI performance.

Platform and Socket Changes

Nova Lake-S will require a new LGA 1954 socket and 900-series chipsets. To improve CPU cooler contact and address potential bending issues, Intel is reportedly developing a new retention mechanism.

Premium motherboards are expected to feature 2L-ILM (Independent Loading Mechanism) sockets. This dual-lever retention system is designed to provide a flatter integrated heat spreader (IHS) contact, which may render third-party anti-bend contact frames obsolete.

Development Timeline

The development of Nova Lake-S has been tracked through several key milestones over the last two years:

• August 2024: First mentions of Nova Lake.
• April 2025: Mention of the new LGA 1954 socket.
• June 2025: Initial CPU specifications leaked.
• September 2025: 52-core model spotted.
• October 2025: CEO Lip-Bu Tan mentions Nova Lake.
• November 2025: First major mentions of bLLC cache.
• January 2026: Information on Xe3P architecture emerges.
• February 2025: Leaks regarding 900-series chipsets and power details.

The company is reportedly pushing power limits significantly with this generation to maximize performance. This architectural shift represents an attempt to consolidate Intel’s position in the desktop market by moving away from the designs used in Arrow Lake and introducing a more aggressive tile-based approach.