India’s Semiconductor Ambitions: From Chip Design to Global Manufacturing Hub

Semicon 2.0 Outlay and Strategic Pillars

The second phase of the India Semiconductor Mission, known as Semicon 2.0, was approved in July 2026 with an announced financial outlay of approximately $13 billion, or Rs 1,27,500 crore. According to Electronics and IT Minister Ashwini Vaishnaw, the updated framework moves the country from demonstrating intent to executing projects at scale. The program builds on the foundational framework established by the initial 2021 policy, which carried an outlay of Rs 76,000 crore. Semicon 2.0 is structured around six strategic pillars covering design, machines and materials, new fabs, advanced packaging, research and development, and talent development.

Manufacturing Progress Under Phase One

India’s push into physical production has advanced significantly since the launch of the initial program, which faced an industry-wide setback following a devastating 1989 fire at the state-run Semiconductor Complex Limited in Mohali. Under the first phase of the initiative, 12 semiconductor manufacturing projects had been approved across six states by July 2026, drawing cumulative investment commitments exceeding Rs 1.64 lakh crore. These approved sites include a silicon fabrication facility, a silicon carbide facility, an integrated Gallium Nitride Micro LED display fabrication facility, and nine semiconductor packaging units. Companies including Micron, Kaynes, and CG Semi have already commenced commercial production in the country.

Addressing the Supply Chain and IP Ownership

Despite manufacturing progress, India still imports more than 90 percent of its chipmaking equipment, prompting Semicon 2.0 to offer fiscal support to domestic producers of semiconductor equipment, chemicals, gases, and raw materials. At the same time, policy incentives target the ownership gap in chip design. While India hosts roughly 20 percent of the world’s chip design talent across Global Capability Centers in cities like Bengaluru, Hyderabad, Noida, and Pune supporting firms like Intel, Qualcomm, Texas Instruments, and NXP, much of that intellectual property has historically been owned by foreign parent companies. To capture domestic value, ISM 2.0 ties deployment-linked design incentives to a co-ownership condition requiring supported chip designs to be co-owned by a state agency and retained within the country. Industry analysts note that while this rule secures national technological assets, it may complicate venture funding, licensing, and acquisitions for fabless startups seeking to scale.

Talent Pipeline and Geoeconomic Realignment

To sustain the workforce demands of the expanding sector, the Chips to Startup program has provided semiconductor education and training across academic institutions, training more than 68,000 students in chip design alongside more than one lakh engineers given access to advanced chip-design tools. This domestic human capital intersects with broader geoeconomic shifts, as the United States, the European Union, Japan, and South Korea pursue supply-chain de-risking strategies away from geographical concentration in Taiwan and exposure to China. Global firms view India as a politically safe node in the international semiconductor value chain, reinforcing the country’s long-term manufacturing trajectory.